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IEEE ROOT Projects at MTech Projects feature the latest project topics with Abstract, Source Code, Thesis, Report, Documentation, Research Paper Writing, Presentation ppt, Video demo, and Expert guidance for BTech, MTech, BE, ME, MS and PhD students. We support engineering students and researchers across Hyderabad, Bengaluru, Chennai, Mumbai, Delhi, Pune, Kolkata, Ahmedabad, Kochi and other major cities in India, USA, UK.

Latest ROOT IEEE Project Titles [2026]

S.No Project Title Abstract
361 Graph-Based Transistor Network GenerationMethod for Super gate Design - 2016 Abstract
362 A Comparator-Based Rail Clamp - 2016 Abstract
363 A Low Power Trainable Neuromorphic IntegratedCircuit That Is Tolerant to Device Mismatch - 2016 Abstract
364 Analysis of 8 bit RCA adder at different nanometer regime - 2016 Abstract
365 PNS-FCR: Flexible Charge RecyclingDynamic Circuit Technique forLow-Power Microprocessors - 2016 Abstract
366 Design Methodology for Voltage-Scaled Clock Distribution Networks - 2016 Abstract
367 One-Cycle Correction of Timing Errors in PipelinesWith Standard Clocked Elements - 2016 Abstract
368 A Single-Ended With Dynamic Feedback Control 8T Sub threshold SRAM Cell - 2016 Abstract
369 Full-Swing Local Bitline SRAM ArchitectureBased on the 22-nm FinFET Technologyfor Low-Voltage Operation - 2016 Abstract
370 A Low-Power Incremental Delta–SigmaADC for CMOS Image Sensors - 2016 Abstract
371 Dual Use of Power Lines for Design-for-Testability—A CMOS Receiver Design - 2016 Abstract
372 A 55-GHz-Bandwidth Track-and-Hold Amplifierin 28-nm Low-Power CMOS - 2016 Abstract
373 Low-Power ASK Detector for Low ModulationIndexes and Rail-to-Rail Input Range - 2016 Abstract
374 Low-Power Variation-Tolerant Nonvolatile Lookup Table Design - 2016 Abstract
375 A Fixed-Point Squaring Algorithm Using an Implicit Arbitrary Radix Number System - 2016 Abstract
376 An Improved Design of a Reversible Fault Tolerant LUT-Based FPGA - 2016 Abstract
377 An Improved Signed Digit Representation Approach for Constant Vector Multiplication - 2016 Abstract
378 Area-Delay Efficient Digit-Serial Multiplier Based on kPartitioning Scheme Combined With TMVP Block Recombination Approach - 2016 Abstract
379 Area-Delay-Power-Aware Adder Placement Method for RNS Reverse Converter Design - 2016 Abstract
380 Efficient Implementation of Scan Register Insertion on Integer Arithmetic Cores for FPGAs - 2016 Abstract

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