PROJECT TITLE :

A Hardware Efficient Implementation of a Digital Baseband Receiver for High-Capacity Millimeter-Wave Radios

ABSTRACT:

This paper presents an implementation answer for a digital baseband receiver, which consists mainly of an analog symbol timing recovery (STR) block and a digital carrier recovery block. The STR is realized based mostly on “one-sample-per-symbol” sampling, ensuing in relaxed demand on the A/D converter’s sampling speed. In this sense, the proposed implementation answer is hardware efficient. To functionally verify the answer, an indication-of-concept E-band link system is implemented and tested within the laboratory, which supports five-Gbit/s knowledge traffic using sixteen quadrature amplitude modulation. The take a look at results demonstrate that the proposed resolution works for prime-capability millimeter-wave radios for purpose-to-purpose links, one of the targeted applications.