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  4. High-Performance Pipelined Architecture of Elliptic Curve Scalar Multiplication Over GF(2m) - 2016
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Category: MTech VLSI Projects
By MTech Projects
MTech Projects
01.Jun
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High-Performance Pipelined Architecture of Elliptic Curve Scalar Multiplication Over GF(2m) - 2016

PROJECT TITLE :

High-Performance Pipelined Architecture of Elliptic Curve Scalar Multiplication Over GF(2m) - 2016

ABSTRACT:

A high performance design of elliptic curve scalar multiplication based mostly on the Montgomery ladder technique over finite field GF(2m) is proposed. A pseudo-pipelined word serial finite field multiplier with word size w, appropriate for the scalar multiplication is also developed. Implemented in hardware, this method performs a scalar multiplication in approximately 6lceilm/wrceil(m-1) clock cycles and therefore the gate delay within the critical path is equal to TAND + lceillog2(w/k)rceilTXOR, where TAND and TXOR are delays because of two-input AND and XOR gates respectively and 1 les k Lt w is employed to shorten the essential path.

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  • ROOT
  • Field-Programmable Gate Array (FPGA)
  • Elliptic Curve Cryptography (ECC)
  • Karatsuba-Ofman Multiplier (KOM)
Previous article: A Cache-Assisted Scratchpad Memory for Multiple-Bit-Error Correction - 2016 A Cache-Assisted Scratchpad Memory for Multiple-Bit-Error Correction - 2016 Next article: A High Throughput List Decoder Architecturefor Polar Codes - 2016 A High Throughput List Decoder Architecturefor Polar Codes - 2016
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