PROJECT TITLE :

Fast Energy Efficient Radix-16 Sequential Multiplier - 2017

ABSTRACT:

We tend to propose a brand new sequential multiplier design that generates the radix-sixteen partial product (e.g., F) as 2 high (H) and low (L) parts, such that F = 4H + L, H, L ? 0, 1, 2, 3 × X, where X denotes the multiplicand. The specified laborious 3X multiple is generated in an exceedingly preliminary cycle to the advantage of reducing the cycle time of the main iteration. 2 radix-sixteen carry-save adders are used to get the radix16 accumulated partial product. The synthesis results show improved latency, power dissipation, and energy consumption over the previous relevant styles at the price of further silicon space, while, but, the energy-space product is also lowered.