PROJECT TITLE :

Reduction of Common-Mode Voltage in Multiphase Two-Level Inverters Using SPWM With Phase-Shifted Carriers

ABSTRACT:

The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) strategies from three-section to multiphase occasions. Carrier-based PWM (CPWM) dominates house vector PWM when the part number will increase, because of its straightforward computation and modular implementation. Though intensive work has been done on modifying PWM methods to cut back the common-mode voltage (CMV), not enough work has been done on CPWM ways with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) methodology for 5-phase and six-section 2-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the character of the CMV. Both experiment and simulation results suits theoretical analysis that compared with the traditional SPWM, the PS-SPWM will effectively scale back the CMV in peak-to-peak worth and RMS value, though it leads to a higher phase current distortion. Yet, the hardware realization of PS-SPWM for multiphase inverters by a distributed Control System is presented during this paper.