PROJECT TITLE :

Improving the Linearity and Power Efficiency of Active Switched-Capacitor Filters in a Compact Die Area

ABSTRACT:

The die size of multistandard wireless transceivers in ultrascaled CMOS is dominated by the baseband low-pass filters (LPFs), that sometimes count on passive- elements to outline the time constant. To break this area constraint, this paper revisits the active switched-capacitor (SC) LPF for its united advantages of clock-rate-defined bandwidth, accurate cutoff frequency, and small die size thanks to capacitor-ratio-based sizing and no spare elements. The key challenges of active-SC LPFs are the speed- and linearity-to-power tradeoffs, that are addressed by two circuit techniques: 1) switched-current aiding (SCA) and a pair of) precharging (PC). The SCA accelerates the charging speed of the mixing capacitor, whereas the PC improves the linearity when charging the load capacitor. 3 prototypes (first order, biquad, and fifth-order Butterworth) fabricated in an exceedingly sixty five-nm CMOS method validate the feasibility of the proposed SCA and PC techniques.